Digital systems designLaajuus (5 cr)
Course unit code: TE00DJ62
General information
- Credits
- 5 cr
- Teaching language
- English
- Responsible person
- Jarno Tuominen
Objective
After completing the course the student:
- can design and implement digital logic using VHDL language
- knows basic principles of FPGA functionality.
Content
- VHDL
- combinatorial logic
- sequential logic
- state machines
- FPGA
Qualifications
Introduction to Electronics