Study Guide

Objective

After completing the course the student:
- can design and implement digital logic using VHDL language
- knows basic principles of FPGA functionality.

Content

- VHDL
- combinatorial logic
- sequential logic
- state machines
- FPGA

Materials

Will be informed at the beginning of the course

Teaching methods

Lectures
Exercises
Self study
Project work
Written exam

Exam schedules

Exam 1: 4.12.
Exam 2: 11.12.
Exam 3: TBD

Completion alternatives

None

Student workload

Contact teaching / lectures 12*1h
Contact teaching / lab work 12*3h
Project work xx hours, TBD
Self studying xx hours, TBD

Content scheduling

VHDL programming
Course duration 2.9.2019 - 13.12.2019
Topics:
- VHDL
- combinatorial logic
- sequential logic
- state machines
- FPGA
After completing the course the student:
- can design and implement digital logic using VHDL language
- knows basic principles of FPGA technology and related tools

Further information

Basic skills in programming (any language) is mandatory
Basic skills in electronics is recommended

Evaluation scale

H-5

Assessment methods and criteria

Exam 30%
Lab exercises 30%
Project work 40%

Assessment criteria, fail (0)

Less than x% of exercises completed
OR
Less than x points in exam
OR
Project work not submitted

Assessment criteria, satisfactory (1-2)

To be defined

Assessment criteria, good (3-4)

To be defined

Assessment criteria, excellent (5)

To be defined

Qualifications

Introduction to Electronics and Transmission