Siirry suoraan sisältöön

VHDL (5 op)

Toteutuksen tunnus: 5051158-3008

Toteutuksen perustiedot


Ilmoittautumisaika

01.08.2023 - 07.09.2023

Ajoitus

31.08.2023 - 31.12.2023

Opintopistemäärä

5 op

Toteutustapa

Lähiopetus

Yksikkö

Tekniikka ja liiketoiminta

Toimipiste

Kupittaan kampus

Opetuskielet

  • Englanti

Paikat

20 - 40

Koulutus

  • Tieto- ja viestintätekniikan koulutus
  • Degree Programme in Information and Communications Technology

Opettaja

  • Jarno Tuominen

Vastuuopettaja

Jarno Tuominen

Ajoitusryhmät

  • Group 1 (Koko: 25. Avoin AMK: 0.)
  • Group 2 (Koko: 25. Avoin AMK: 0.)

Ryhmät

  • ICTMODembeddedSem
    MOD Embedded System (International Semester)
  • PTIVIS21S
    Embedded Software and IoT

Pienryhmät

  • Group 1
  • Group 2
  • 04.09.2023 09:00 - 12:00, Lab/Group 1, VHDL 5051158-3008
  • 06.09.2023 09:00 - 12:00, Lab/Group 2, VHDL 5051158-3008
  • 11.09.2023 09:00 - 12:00, Lab/Group 1, VHDL 5051158-3008
  • 13.09.2023 09:00 - 12:00, Lab/Group 2, VHDL 5051158-3008
  • 18.09.2023 09:00 - 12:00, Lab/Group 1, VHDL 5051158-3008
  • 20.09.2023 09:00 - 12:00, Lab/Group 2, VHDL 5051158-3008
  • 25.09.2023 09:00 - 12:00, Labs/Group 1, VHDL 5051158-3008
  • 27.09.2023 09:00 - 12:00, Lab/Group 2, VHDL 5051158-3008
  • 02.10.2023 09:00 - 12:00, Labs/Group 1, VHDL 5051158-3008
  • 04.10.2023 09:00 - 12:00, Lab/Group 2, VHDL 5051158-3008
  • 09.10.2023 09:00 - 12:00, Lab/Group 1, VHDL 5051158-3008
  • 11.10.2023 09:00 - 12:00, Lab/Group 2, VHDL 5051158-3008
  • 23.10.2023 09:00 - 12:00, Lab/Group 1, VHDL 5051158-3008
  • 25.10.2023 09:00 - 12:00, Lab/Group 2, VHDL 5051158-3008
  • 30.10.2023 09:00 - 12:00, Lab/Group 1, VHDL 5051158-3008
  • 01.11.2023 09:00 - 12:00, Lab/Group 2, VHDL 5051158-3008
  • 06.11.2023 09:00 - 12:00, Lab/Group 1, VHDL 5051158-3008
  • 08.11.2023 09:00 - 12:00, Lab/Group 2, VHDL 5051158-3008
  • 13.11.2023 09:00 - 12:00, Lab/Group 1, VHDL 5051158-3008
  • 15.11.2023 09:00 - 12:00, Lab/Group 2, VHDL 5051158-3008
  • 20.11.2023 09:00 - 12:00, Lab/Group 1, VHDL 5051158-3008
  • 22.11.2023 09:00 - 12:00, Lab/Group 2, VHDL 5051158-3008
  • 27.11.2023 09:00 - 12:00, Lab/Group 1, VHDL 5051158-3008
  • 29.11.2023 09:00 - 12:00, Lab/Group 2, VHDL 5051158-3008
  • 04.12.2023 09:00 - 12:00, Lab/Group 1, VHDL 5051158-3008
  • 07.12.2023 09:00 - 12:00, Lab/Group 2, VHDL 5051158-3008
  • 11.12.2023 09:00 - 12:00, Lab/Group 1, VHDL 5051158-3008
  • 14.12.2023 09:00 - 12:00, Lab/Group 2, VHDL 5051158-3008

Tavoitteet

After completing the course the student:
- can design and implement digital logic using VHDL language
- knows basic principles of FPGA functionality.

Sisältö

- VHDL
- combinatorial logic
- sequential logic
- state machines
- FPGA

Oppimateriaalit

Will be informed at the beginning of the course

Opetusmenetelmät

Lectures
Exercises
Self study
Written (short) exam

Tenttien ajankohdat ja uusintamahdollisuudet

Exam 1: W49
Exam 2: TBD
Exam 3: TBD

Toteutuksen valinnaiset suoritustavat

None

Opiskelijan ajankäyttö ja kuormitus

Contact teaching / lectures 7*1h (7h)
Contact teaching / lab work 14*3h (42h)

Self studying / independent work (85h)
Exam (1h)

Total: 135h

Sisällön jaksotus

VHDL/FPGA development
Course duration 9/2022 - 12/2022
Topics:
- VHDL
- combinatorial logic
- sequential logic
- state machines
- FPGA
After completing the course the student:
- can design and implement digital logic using VHDL language
- knows principles of FPGA technology and related tools
- understands the basics of computer architecture

Viestintäkanava ja lisätietoja

Basic skills in programming (any language) is mandatory
Basic skills in electronics is highly recommended
This is a laboratory course
The tools used in this course require a lot of hard disk space on your laptop (>10GB)
Support is given primarily for windows-environment, Linux can be used as well (limited support). No support for Mac users, tools must be run in virtual machine, which is very likely to cause big problems. Thus, Mac highly not recommended.

Arviointiasteikko

H-5

Arviointimenetelmät ja arvioinnin perusteet

Exam 25%
Lab exercises 75%
Project work TBD%

Hylätty (0)

Less than 66% of lab exercises completed
OR
Less than 10 points in exam
OR (TBD)
Project work not submitted

Arviointikriteerit, tyydyttävä (1-2)

grade 1: 66% of lab exercises completed, 50% of max points in exam

Arviointikriteerit, hyvä (3-4)

To be defined

Arviointikriteerit, kiitettävä (5)

To be defined

Esitietovaatimukset

Elektroniikan ja tiedonsiirron perusteet